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ltc3537 1 3537fc typical application features applications description 2.2 mhz, 600ma synchronous step-up dc/dc converter and 100ma ldo the ltc ? 3537 combines a high ef? ciency, 2.2mhz step-up dc/dc converter with an independent 100ma low dropout regulator (ldo). the step-up converter starts from an input voltage as low as 0.68v and contains an internal 0.4 switch and a 0.6 synchronous recti? er that disconnects from the output when disabled in shutdown. a switching frequency of 2.2mhz minimizes solution footprint by allowing the use of tiny, low pro? le inductors and ceramic capacitors. the current mode pwm design is internally compensated, reducing external parts count. fixed frequency switching is maintained until a light load current is sensed, at which point burst mode ? operation is engaged to maximize ef? ciency. for low noise operation, burst mode operation can be disabled. anti-ring circuitry reduces emi by damping the inductor in discontinuous mode. additional features include a low shutdown current of under 1a and thermal overload protection. the integrated ldo regulator provides a very low noise, programmable low dropout supply. n high ef? ciency step-up dc/dc converter and ldo step-up n v in : 0.68v to 5v, v out : 1.5v to 5.25v i out : 100ma at 3.3v, v in >0.8v n 2.2mhz fixed frequency operation n synchronous recti? er with output disconnect n burst mode operation (pin selectable) linear ldo regulator n v in : 1.8v to 5.5v, v out : 0.6v to 5v i out : 100ma n 100mv dropout voltage at 50ma n 24db ripple rejection at f sw combined n power good indicators n low-battery comparator n 30a i q n low pro? le 3mm 3mm 0.75mm package n wireless microphones n portable medical instruments n noise cancelling/portable headsets n rf and audio power l , lt, ltc, ltm and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. ef? ciency and power loss vs load current load current (ma) 0.01 efficiency (%) power loss (mw) 100 80 90 60 20 30 40 70 50 10 0 1000 10 0.1 1 100 0.01 10 0.1 3537 ta01b 1000 1100 efficiency power loss v inb , mode = 1.8v 3537 ta01a ltc3537 v inb 1f alkaline 0.8v to 1.6v v outb 3.3v v oldo 3v 2.2h r6 665k enldo v outb fbb v inl v oldo fbl enbst mode pgnd sgnd sw r2 1.74m r1 1m r3 511k r4 2.05m r5 1.0m 10f 1f on off burst pwm pgdl pgdb lbo lbi + 33pf
ltc3537 2 3537fc pin configuration absolute maximum ratings v inb and v inl voltage ................................... ?0.3v to 6v sw dc voltage ............................................. ?0.3v to 6v sw pulsed (<100ns) voltage ....................... ?0.3v to 7v fbb, fbl, pgdb, pgdl voltage ................... ?0.3v to 6v mode, enbst, enldo voltage ................... ?0.3v to 6v lbi and lbo voltage .................................... ?0.3v to 6v v outb , v oldo ............................................... ?0.3v to 6v operating temperature (notes 2, 5) ......... ?40c to 85c junction temperature ........................................... 125c storage temperature range ................... ?65c to 125c (note 1) 16 15 14 13 5 6 7 8 top view ud package 16-lead (3mm s 3mm) plastic qfn 9 17 10 11 12 4 3 2 1mode lbi sgnd v inb v inl v oldo fbl fbb lbo pgnd sw v outb pgdb enbst pgdl enldo t jmax = 125c, e ja = 68c/w (note 6) exposed pad (pin 17) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking package description temperature range ltc3537eud#pbf ltc3537eud#trpbf ldbd 16-lead (3mm 3mm) plastic qfn ?40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v inb = 1.2v, v outb = 3.3v, unless otherwise noted. symbol parameter conditions min typ max units boost converter v inmin minimum start-up voltage i load = 1ma 0.68 0.8 v v outb output voltage range l 1.5 5.25 v v fbb feedback voltage l 1.179 1.21 1.240 v i fbb feedback input current 150 na i qshdn quiescent current - shutdown v enbst = v enldo = 0v, not including sw leakage, v outb = 0v 0.02 1 a i qactive quiescent current - active measured on v outb , nonswitching, mode = 1.2v, v enldo = 0v 300 500 a i qburst quiescent current - burst measured on v outb , fbb >1.24v, mode = 1.2v, v enldo = 0v 15 a i nleak nmos switch leakage current v sw = 5v 0.1 5 a i pleak pmos switch leakage current v sw = 5v, v outb = 0v 0.1 10 a
ltc3537 3 3537fc electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v inb = 1.2v, v outb = 3.3v, unless otherwise noted. symbol parameter conditions min typ max units r nmos nmos switch on resistance v outb = 1.8v v outb = 3.3v v outb = 5v 0.8 0.4 0.3 r pmos pmos switch on resistance v outb = 1.8v v outb = 3.3v v outb = 5v 1 0.6 0.4 i lim nmos current limit (note 4) l 600 750 ma t limdelay current limit delay time to output (note 3) 40 ns max duty cycle v fbb = 1.15v l 87 92 % min duty cycle v fbb = 1.3v l 0% f sw switching frequency l 2 2.2 2.4 mhz v enbsth enbst input high voltage 0.8 v v enbstl enbst input low voltage 0.3 v i enbstin enbst input current v enbst = 5.5v 1.5 a v modeh mode input high voltage 0.8 v v model mode input low voltage 0.3 v i modein mode input current v mode = 5.5v 1.5 a t ss soft-start time 0.5 ms v fblbi lbi feedback voltage falling threshold 530 553 575 mv lbi hysteresis voltage 35 mv i lbiin lbi input current v lbi = 1v 10 50 na v lbolow lbo voltage low i lbo = 5ma 200 mv i lboleak lbo leakage current v lbo = 5.5v 0.01 1 a v pgdblow pgdb voltage low i pgdb = 5ma 200 mv i pgdbleak pgdb leakage current v pgdb = 5.5v 0.01 1 a pgdb trip point voltage v fbb rising 94 % v outb pgdb hysteresis 6% symbol parameter conditions min typ max units ldo regulator v inl input voltage range 1.8 5.5 v v oldo output voltage range i load = 100ma v fbl 5v i outmax max output current l 100 ma v fbl feedback voltage l 590 600 610 mv line regulation v inl = 1.8v to 5.5v 0.1 % load regulation i load = 10ma to 90ma 0.4 % v dropout dropout voltage i o = 50ma 100 mv the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v inl = 3.3v, v oldo = 3v, unless otherwise noted.
ltc3537 4 3537fc note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3537 is guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: speci? cation is guaranteed by design and not 100% tested in production. electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v inl = 3.3v, v oldo = 3v, unless otherwise noted. symbol parameter conditions min typ max units psrr ripple rejection f = 2.2mhz at i load = 100ma (note 3) 24 db i short short circuit current limit v oldo = 0v l 110 150 ma v enldoh enldo input high voltage 0.8 v v enldol enldo input low voltage 0.3 v i enldo enldo input current v enldo = 5.5v 1.5 a v pgdllow pgdl voltage low i pgdl = 5ma 200 mv i pgdlleak pgdl leakage current v pgdl = 5.5v 0.01 1 a pgdl trip point v fbl rising 96 % v oldo pgdl hysteresis 3% note 4: current measurements are made when the output is not switching. note 5: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may result in device degradation or failure. note 6: failure to solder the exposed backside of the package to the pc board ground plane will result in a thermal resistance much higher than 68c/w.
ltc3537 5 3537fc typical performance characteristics ef? ciency vs load current and v inb for v outb = 5v maximum output current vs v inb minimum load resistance during start-up vs v inb start-up delay time vs v inb burst mode threshold current vs v inb burst mode threshold current vs v inb ef? ciency vs load current and v inb for v outb = 1.8v ef? ciency vs load current and v inb for v outb = 3.3v no-load input current vs v inb t a = 25c unless otherwise noted. load current (ma) 0.01 efficiency (%) power loss (mw) 100 80 90 60 20 30 40 70 50 10 0 1000 10 0.1 1 100 0.01 10 0.1 3537 g01 1000 1 100 ploss at v inb = 1v ploss at v inb = 1.2v ploss at v inb = 1.5v v inb = 1v v inb = 1.2v v inb = 1.5v load current (ma) 0.01 efficiency (%) power loss (mw) 100 80 90 60 20 30 40 70 50 10 0 1000 10 0.1 1 100 0.01 10 0.1 3537 g02 1000 1 100 ploss at v inb = 1.2v ploss at v inb = 1.8v ploss at v inb = 2.4v ploss at v inb = 2.8v v inb = 1.2v v inb = 1.8v v inb = 2.4v v inb = 2.8v load current (ma) 0.01 efficiency (%) power loss (mw) 100 80 90 60 20 30 40 70 50 10 0 1000 10 0.1 1 100 0.01 10 0.1 3537 g04 1000 1 100 ploss at v inb = 1.2v ploss at v inb = 2.4v ploss at v inb = 3.6v ploss at v inb = 4.2v v inb = 1.2v v inb = 2.4v v inb = 3.6v v inb = 4.2v v inb (v) 0.5 load current (ma) 1000 800 900 600 200 300 400 700 500 100 0 3.5 3 2.5 1.5 3537 g05 4.5 2 14 v outb = 2.5v v outb = 1.8v v outb = 3.3v v outb = 5v v inb (v) 0.8 load ( ) 1000 100 10 1.6 1.5 1.4 1.3 1.2 1 3537 g06 1.8 1.1 0.9 1.7 v inb (v) 1 delay (s) 60 30 20 10 50 40 0 4.5 4 3.5 3 2 3537 g07 5 2.5 1.5 v inb (v) 0.8 30 25 20 15 10 5 0 45 40 35 load current (ma) 0.9 1 1.1 1.2 1.3 1.4 3537 g08 enter burst leave burst v outb = 1.8v c out = 10f l = 2.2h v inb (v) 0.8 30 25 20 15 10 5 0 50 45 40 35 load current (ma) 1 1.2 1.4 1.6 1.8 2 3537 g09 enter burst leave burst v outb = 2.5v c out = 10f l = 2.2h v inb (v) 0.6 120 100 60 80 40 20 0 180 160 140 i inb (a) 1.2 1.8 2.4 3 4.8 3.6 4.2 3537 g03 v outb = 5v v outb = 3.3v v outb = 2.5v v outb = 1.8v
ltc3537 6 3537fc typical performance characteristics voltage feedback change vs temperature start-up voltage vs temperature burst mode quiescent current vs v outb t a = 25c unless otherwise noted. temperature ( c) C40 voltage change (%) 0.05 0.00 C0.10 C0.15 C0.20 C0.25 C0.30 40 60 20 0 3537 g16 80 C20 normalized to 20 c v fbb and v fbl temperature ( c) C40 v inb (v) 0.80 0.75 0.70 0.65 0.60 0.55 0.50 40 60 20 0 3537 g17 80 C20 v outb (v) 1.8 i q (a) 60 50 30 40 20 10 3.8 4.3 3.3 2.8 3537 g18 4.8 2.3 enldo = high r ds(on) vs v outb oscillator frequency change vs temperature r ds(on) change vs temperature v outb (v) 1.5 r ds(on) ( ) 1.0 0.9 0.8 0.7 0.6 0.5 0.3 0.4 0.2 3.5 4 4.5 3 2.5 3537 g13 5 2 nmos pmos temperature ( c) C40 frequency change (%) 1 0 C1 C2 C3 C4 40 60 20 0 3537 g14 80 C20 normalized to 25 c temperature ( c) C40 r ds(on ) change (%) 30 20 10 0 C10 C20 C30 40 60 20 0 3537 g15 80 C20 nmos pmos normalized to 25 c burst mode threshold current vs v inb burst mode threshold current vs v inb oscillator frequency change vs v outb v inb (v) 0.8 30 20 10 0 60 50 40 load current (ma) 1 1.2 1.4 1.6 1.8 2.4 2 2.2 3537 g10 enter burst leave burst v outb = 3.3v c out = 10f l = 2.2h v inb (v) 0.9 120 100 60 80 40 20 0 180 160 140 load current (ma) 1.4 1.9 2.4 2.9 4.4 3.4 3.9 3537 g11 enter burst leave burst v outb = 5v c out = 10f l = 2.2h v outb (v) 1.5 frequency change (%) 1 0 C1 C2 C3 C5 C4 C6 3.5 4 4.5 3 2.5 3537 g12 5 2 normalized to 3.3v
ltc3537 7 3537fc fixed frequency switching waveform and v outb ripple burst mode waveforms v outb and i inb during soft-start typical performance characteristics load current step response (from burst mode operation) load current step response (fixed frequency) load current step response (fixed frequency) load current step response (from burst mode operation) ldo dropout voltage vs load current t a = 25c unless otherwise noted. load current (ma) 0 dropout voltage (mv) 140 120 100 80 40 60 20 0 80 70 60 50 40 90 30 20 3537 g26 100 10 v outb 20mv/div i l 10ma/div v inb = 2.4v v outb = 3.3v c outb = 10f 3537 g20 10s/div v inb = 2.4v v outb = 3.3v c out = 4.7f 3537 g22 v outb 100mv/ div i load 100ma/ div 100s/div v inb = 2.4v v outb = 3.3v c out = 4.7f 3537 g23 i load 100ma/ div v outb 100mv/ div 100s/div v inb = 3.6v v outb = 5v c outb = 4.7f 3537 g24 i load 100ma/ div v outb 100mv/ div 100s/div v inb = 3.6v v outb = 5v c outb = 4.7f 3537 g25 i load 100ma/ div v outb 100mv/ div 100s/div v inb = 2.4v v outb = 3.3v c outb = 4.7f 3537 g19 200ns/div sw 2v/div v outb 20mv/ div enbst v outb 2v/div i vinb 200ma/ div v inb = 1.2v v outb = 3.3v c outb = 4.7f i load = 10ma 3537 g21 100s/div ldo input ripple rejection vs frequency frequency (khz) attenuatioin (db) 3537 g29 60 50 40 30 20 10 0 0.01 0.1 1 10 100 v inl = 3.3v v oldo = 3v c load = 4.7f i load = 50ma
ltc3537 8 3537fc typical performance characteristics ldo load current step response ldo load current step response ldo load current step response t a = 25c unless otherwise noted. v inl = 5v v oldo = 3v c out = 1f 3537 g32 i load 100ma/ div v oldo 100mv/ div 100s/div v inl = 3.3v v oldo = 3v c out = 1f 3537 g31 i load 100ma/ div v oldo 100mv/ div 100s/div v inl = 5v v oldo = 1.8v c out = 1f 3537 g33 i load 100ma/ div v oldo 100mv/ div 100s/div ldo current limit vs temperature temperature ( c) C40 load current (%) 7 6 5 4 2 3 1 C1 0 C2 60 40 20 0 3537 g30 80 C20 normalized to 25 c
ltc3537 9 3537fc pin functions mode (pin 1): logic controlled input for the auto-burst mode feature. mode = high: pwm operation with burst mode operation mode = low: pwm operation only lbi (pin 2): low-battery comparator non-inverting input. (comparator enabled with enbst or enldo) sgnd (pin 3): signal ground. provide a short direct pcb path between gnd and the (C) side of the input and output capacitors. v inb (pin 4): input supply for the step-up converter. connect a minimum of 1f ceramic decoupling capacitor from this pin to ground. pgdb (pin 5): power good indicator for the boost con- verter. this is an open-drain output that sinks current when v outb is greater than 94% of the programmed voltage. enbst (pin 6): logic controlled shutdown input for the boost converter. enbst = high: normal operation enbst = low: shutdown pgdl (pin 7): power good indicator for the ldo regulator. this is an open-drain output that sinks current when v oldo is greater than 96% of the programmed voltage. enldo (pin 8): logic controlled shutdown input for the ldo regulator. enldo = high: normal operation enldo = low: shutdown fbb (pin 9): feedback input to the g m error ampli? er of the boost converter. connect resistor divider tap to this pin. the output voltage can be adjusted from 1.5v to 5.25v by: v outb = 1.2v ? [1 + (r2/r1)] fbl (pin 10): feedback input to the g m error ampli? er of the ldo. connect resistor divider tap to this pin. the output voltage can be adjusted from 0.6v (typical) to 5v by: v oldo = 0.6v ? [1 + (r4/r3)] v oldo (pin 11): ldo regulator output. pcb trace from v oldo to the output ? lter capacitor (1f minimum) should be as short and as wide as possible. v inl (pin 12): input supply for the ldo regulator. v outb (pin 13): output voltage sense input and drain of the internal synchronous recti? er. pcb trace length from v outb to the output ? lter capacitor (4.7f minimum) should be as short and wide as possible. sw (pin 14): switch pin. connect the inductor between sw and v inb . keep these pcb trace lengths as short and wide as possible to reduce emi. if the inductor current falls to zero or enbst is low, an internal anti-ringing switch is connected from sw to v inb to minimize emi. pgnd (pin 15): power ground. provide a short direct pcb path between gnd and the (C) side of the input and output capacitors. lbo (pin 16): low-battery comparator output. (open- drain) exposed pad (pin 17): power ground. the exposed pad must be soldered to the pcb.
ltc3537 10 3537fc block diagram C + C + + C fbb 1.13v 0.55v C + 3537 bd sw enbst v outb lbo mode sgnd pgnd lbi v inb enldo pgdb pgdl fbb v inl v oldo fbl + C fbl 0.55v + C + C 0.6v logic gate drivers and anti-cross conduction thermal shutdown 2.2mhz osc mode control gate driver startup clamp shutdown shutdown v best v out v best uvlo v ref v ref 1.2v v ref 3 well switch well switch r2 r1 r4 r3 slope compensation r5 r6 v in
ltc3537 11 3537fc operation the ltc3537 is a 2.2mhz synchronous step-up (boost) converter and ldo regulator housed in a 16-lead 3mm 3mm qfn package. included with the ability to start up and operate from inputs less than 0.7v, the ltc3537 features ? xed frequency, current mode pwm control for exceptional line and load regulation. the current mode architecture with adaptive slope com- pensation provides excellent transient load response, requiring minimal output ? ltering. internal soft-start and loop compensation simpli? es the design process while minimizing the number of external components. with its low r ds(on) and low gate charge internal n-channel mosfet switch and p-channel mosfet synchronous recti? er, the ltc3537 achieves high ef? ciency over a wide range of load currents. automatic burst mode operation maintains high ef? ciency at very light loads, reducing the quiescent current to just 30a. operation can be best understood by referring to the block diagram. low voltage start-up the ltc3537 step-up converter includes an independent start-up oscillator designed to operate at an input voltage of 0.68v (typical). soft-start and inrush current limiting are provided during start-up, as well as normal mode. when either v inb or v outb exceeds 1.4v typical, the ic enters normal operating mode. when the output voltage exceeds the input by 0.24v, the ic powers itself from v outb instead of v inb . at this point the internal circuitry has no dependency on the v inb input voltage, eliminating the requirement for a large input capacitor. the input voltage can drop as low as 0.5v after start-up is achieved. the limiting factor for the application becomes the availability of the power source to supply suf? cient energy to the output at low voltages, and maximum duty cycle, which is clamped at 92% typical. note that at low input voltages, small voltage drops due to series resistance become critical, and greatly limit the power delivery capability of the converter. low noise fixed frequency operation soft-start the ltc3537 contains internal circuitry to provide soft- start operation. the soft-start circuitry slowly ramps the peak inductor current from zero to its peak value of 750ma (typical) in approximately 0.5ms, allowing start-up into heavy loads. the soft-start circuitry is reset in the event of a shutdown command or a thermal shutdown. oscillator an internal oscillator sets the switching frequency to 2.2mhz. shutdown shutdown of the boost converter is accomplished by pulling enbst below 0.3v and enabled by pulling enbst above 0.8v. note that enbst can be driven above v inb or v outb , as long as it is limited to less than the absolute maximum rating. boost error ampli? er the non-inverting input of the transconductance error ampli? er is internally connected to the 1.2v reference and the inverting input is connected to fbb. clamps limit the minimum and maximum error amp output voltage for improved large-signal transient response. power converter control loop compensation is provided internally. an exter- nal resistive voltage divider from v outb to ground programs the output voltage via fbb from 1.5v to 5.25v. v outb = 1.2v 1 + r2 r 1 boost current sensing lossless current sensing converts the peak current signal of the n-channel mosfet switch into a voltage that is summed with the internal slope compensation. the summed signal is compared to the error ampli? er output to provide a peak current control command for the pwm.
ltc3537 12 3537fc operation boost current limit the current limit comparator shuts off the n-channel mosfet switch once its threshold is reached. the cur- rent limit comparator delay to output is typically 40ns. peak switch current is limited to approximately 750ma, independent of input or output voltage, unless v outb falls below 0.8v, in which case the current limit is cut in half. boost zero current comparator the zero current comparator monitors the inductor cur- rent to the output and shuts off the synchronous recti? er when this current reduces to approximately 30ma. this prevents the inductor current from reversing in polarity, improving ef? ciency at light loads. boost synchronous recti? er to control inrush current and to prevent the inductor cur- rent from running away when v outb is close to v inb , the p-channel mosfet synchronous recti? er is only enabled when v outb > (v inb + 0.24v). boost anti-ringing control the anti-ringing control connects a resistor across the inductor to prevent high frequency ringing on the sw pin during discontinuous current mode operation. although the ringing of the resonant circuit formed by l and c sw (capacitance on sw pin) is low energy, it can cause emi radiation. boost output disconnect the ltc3537 is designed to allow true output disconnect by eliminating body diode conduction of the internal p- channel mosfet synchronous recti? er. this allows v outb to go to zero volts during shutdown, drawing no current from the input source. it also allows inrush current limit- ing at turn-on, minimizing surge currents seen by the input supply. note that to obtain the advantages of output disconnect, there cannot be an external schottky diode connected between the sw pin and v outb . the output disconnect feature also allows v outb to be pulled high, above the nominal regulation voltage, without any reverse current into the power source connected to v inb . thermal overload protection if the die temperature exceeds 160c typical, the ltc3537 boost converter will shut down. all switches will be off and the soft-start capacitor will be discharged. the boost converter will be enabled when the die temperature drops by approximately 15c. boost burst mode operation when enabled (mode pin high), the ltc3537 will auto- matically enter burst mode operation at light load current and return to ? xed frequency pwm mode when the load increases. refer to the typical performance characteristics to see the burst mode threshold current vs v inb . the load current at which burst mode operation is entered can be changed by adjusting the inductor value. raising the inductor value will lower the load current at which burst mode operation is entered. in burst mode operation, the ltc3537 still switches at a ? xed frequency of 2.2mhz, using the same error ampli? er and loop compensation for peak current mode control. this control method eliminates any output transient when switching between modes. in burst mode operation, en- ergy is delivered to the output until it reaches the nominal voltage regulation value, then the ltc3537 transitions to sleep mode where the outputs are off and the ltc3537 consumes only 30a of quiescent current from v outb including the current required to keep the ldo enabled. when the output voltage droops slightly, switching re- sumes. this maximizes ef? ciency at very light loads by minimizing switching and quiescent losses. burst mode output voltage ripple, which is typically 1% peak-to-peak, can be reduced by using more output capacitance (10f or greater), or with a small capacitor (10pf to 50pf) con- nected between v outb and fbb. as the load current increases, the ltc3537 will automati- cally leave burst mode operation. note that larger output capacitor values may cause this transition to occur at lighter loads. once the ltc3537 has left burst mode operation and returned to normal operation, it will remain there until the output load is reduced below the burst threshold.
ltc3537 13 3537fc operation burst mode operation is inhibited during start-up and soft- start and until v outb is at least 0.24v greater than v inb . the ltc3537 will operate at a continuous pwm frequency of 2.2mhz by connecting mode to gnd. at very light loads, the ltc3537 will exhibit pulse-skip operation. single cell to 5v step-up applications due to the high inductor current slew rate in applications boosting to 5v from a single-cell (alkaline, nicd or nimh), the ltc3537 may not enter burst mode operation for input voltages less than 1.2v. refer to the typical performance characteristics curves for the burst mode thresholds for different input and output voltages. ldo regulator operation the ltc3537 includes an independent 100ma low dropout linear regulator (ldo). the v inl pin can be connected to an independent source or connected to the output of the boost regulator. an input capacitor on v inl is optional, but it will help to improve transient responses. the ldo will operate with a v inl down to 1.5v, but speci? cations are guaranteed with v inl from 1.8v to 5.5v. shutdown shutdown of the ldo is accomplished by pulling enldo below 0.3v and enabled by pulling enldo above 0.8v. note that enldo can be driven above v inl or v oldo , as long as it is limited to less than the absolute maximum rating. in the event that the ldo output voltage is held above the input voltage, the ldo goes in to shutdown until the output drops back below the input voltage. in shutdown the ldo will block reverse current from v oldo to v inl . ldo error ampli? er the non-inverting input of the transconductance error ampli? er is internally connected to a 0.6v reference and the inverting input is connected to fbl. the control loop compensation is provided internally. an external resistive voltage divider from v oldo to ground programs the output voltage via fbl from 0.6v to 5v. v oldo = 0.6v 1 + r4 r 3 ldo current sensing and limiting current is sensed across an internal resistor. the guaran- teed minimum output current is 100ma. low-battery indicator the ltc3537 includes a low-battery comparator. the non- inverting input of the comparator is internally connected to a 0.6v reference and the inverting input is connected to lbi. an external resistive voltage divider from v inl to ground programs the threshold voltage. when the volt- age at lbi drops below 0.6v, the open-drain n-channel mosfet will turn on. the n-channel mosfet device is forced off when both the step-up converter and ldo are in shutdown. v lbi = 0.6v 1 + r6 r 5 boost power-good indicator the ltc3537 includes a power-good comparator for the step-up converter. the non-inverting input of the compara- tor is internally connected to a 1.08v reference and the inverting input is connected to the fbb pin. the open-drain mosfet on pgdb will turn on when the output voltage is typically within 6% of the programmed output voltage. output sequencing can be achieved by connecting pgdb to the ldo enable pin (enldo). this would allow the user to keep the ldo off until the step-up converter is regulating. the n-channel mosfet is forced on in shutdown. ldo power-good indicator the ltc3537 includes a power-good comparator for the ldo. the non-inverting input of the comparator is internally connected to a 540mv reference and the inverting input is connected to the fbl pin. the open-drain mosfet on the pgdl pin will turn on when the output voltage is typically within 4% of the programmed output voltage. output sequencing can be achieved by connecting pgdl to the boost enable pin (enbst). this would allow the user to keep the step-up converter off until the ldo is regulating. the n-channel mosfet is forced on in shutdown.
ltc3537 14 3537fc applications information v inb > v outb operation the ltc3537 step-up converter will maintain voltage regu- lation even when the input voltage is above the desired output voltage. note that the ef? ciency is much lower in this mode, and the maximum output current capability will be less. refer to the typical performance characteristics. step-up short-circuit protection the ltc3537 output disconnect feature provides output short circuit protection. to reduce power dissipation under short-circuit conditions, the peak switch current limit is reduced to 400ma (typical). schottky diode although it is not required, adding a schottky diode from sw to v outb will improve ef? ciency by about 4%. note that this defeats the output disconnect and short-circuit protection features. pcb layout guidelines the high speed operation of the ltc3537 demands careful attention to board layout. a careless layout will result in reduced performance. figure 1 shows the recommended component placement. a large ground pin copper area will help to lower the die temperature. a multilayer board with a separate ground plane is ideal, but not absolutely necessary. component selection inductor selection the ltc3537 can utilize small surface mount chip induc- tors due to its fast 2.2mhz switching frequency. inductor values between 1h and 4.7h are suitable for most ap- plications. larger values of inductance will allow slightly greater output current capability (and lower the burst mode threshold) by reducing the inductor ripple current. increasing the inductance above 10h will increase size while providing little improvement in output current capa- bility. the minimum inductance value is given by: l > v inb(min) ? v outb(max) ? v inb(min) () ripple ? v outb(max) where: ripple = allowable inductor current ripple (amps peak-peak) v inb(min) = minimum converter input voltage v outb(max) = maximum output voltage the inductor current ripple is typically set for 20% to 40% of the maximum inductor current. high frequency ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron types, improving ef? ciency. the inductor should have low esr (series resistance of the windings) to reduce the i 2 r power losses, and must be able to support the peak inductor current without saturating. molded chokes and some chip inductors usually do not have enough core area to support the peak inductor currents of 750ma seen on the ltc3537. to minimize radiated noise, use a shielded inductor. see table 1 for suggested components and suppliers. figure 1 3537 f01 5678 16 15 14 13 lbo sw v outb mode v inl v oldo lbi sgnd v inb fbl fbb 1 2 3 4 12 11 10 9 + pgdb enbst pgdl enldo multiple vias to inner ground layers
ltc3537 15 3537fc applications information table 1: recommended inductors vendor part/style coilcraft (847) 639-6400 www.coilcraft.com lpo4815 lps4012, lps4018 mss5131 mss4020 mos6020 me3220 ds1605, do1608 coiltronics www.cooperet.com sd10, sd12, sd14, sd18, sd20, sd52, sd3114, sd3118 fdk (408) 432-8331 www.fdk.com mip3226d4r7m, mip3226d3r3m mipf2520d4r7 mipwt3226d3r0 murata (714) 852-2001 www.murata.com lqh43c lqh32c (-53 series) 301015 sumida (847) 956-0666 www.sumida.com cdrh5d18 cdrh2d14 cdrh3d16 cdrh3d11 cr43 cmd4d06-4r7mc cmd4d06-3r3mc taiyo-yuden www.t-yuden.com np03sb nr3015t nr3012t tdk (847) 803-6100 www.component.tdk.com vlp vlf, vlcf toko (408) 432-8282 www.tokoam.com d412c d518lc d52lc d62lcb wurth (201) 785-8800 www.we-online.com we-tpc type s, m output and input capacitor selection low esr (equivalent series resistance) capacitors should be used to minimize the output voltage ripple. multilayer ceramic capacitors are an excellent choice as they have extremely low esr and are available in small footprints. a 4.7f to 10f output capacitor is suf? cient for most boost applications. larger values up to 22f may be used to obtain extremely low output voltage ripple and improve transient response. x5r and x7r dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. y5v types should not be used. the internal loop compensation of the ltc3537 is designed to be stable with a minimum output capacitor value of 4.7f when in pwm mode on the boost regulator and 1f or greater on the ldo regulator. although ceramic capacitors are recommended, low esr tantalum capaci- tors may be used as well. for the ldo, see figures 2 and 3 for output capacitor value and esr requirements. to reduce burst mode boost output voltage ripple, 10f is recommended. figure 2. ldo regulator output capacitance vs esr figure 3. ldo regulator minimum output capacitance vs v inl /v oldo capacitance (f) esr () 3537 f02 1.6 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.0 1 10 100 region of operation v inl /v oldo 1 minimum output capacitance (f) 5.0 4.5 3.5 3.0 2.5 2.0 1.0 4.0 1.5 0.5 0.0 4 36 3537 f03 7 25
ltc3537 16 3537fc applications information 1-cell to 1.8v, 1.5v 3537 ta02 ltc3537 v inb 1f v outb 1.8v v oldo 1.5v 2.2h r6 665k endlo v outb fbb v inl v oldo fbl enbst mode pgnd sgnd sw r2 499k r1 1m r3 1m r4 1.5m r5 1m 10f 1f on off burst pvm pgdl pgdb lbo lbi alkaline 0.8v to 1.6v + 33pf for the step-up converter, a tantalum capacitor may be used in demanding applications that have large load transients. another method of improving the transient response is to add a small feedforward capacitor across the top resistor of the feedback divider (from v outb to fbb). a typical value of 22pf will generally suf? ce. ceramic capacitors are also a good choice for input de- coupling of the step-up converter and should be located as close as possible to the device. a 2.2f input capacitor is suf? cient for most applications, although larger values may be used without limitations. the ldo regulator will have improved performance with an input capacitor, but it is not required. table 2 shows a list of several ceramic capacitor manufacturers. consult the manufacturers di- rectly for detailed information on their selection of ceramic capacitors. table 2. capacitor vendor information supplier phone website avx (803) 448-9411 www.avxcorp.com murata (714) 852-2001 www.murata.com taiyo-yuden (408) 573-4150 www.t-yuden.com tdk (847) 803-6100 www.component.tdk.com samsung (408) 544-5200 www.sem.samsung.com typical applications
ltc3537 17 3537fc typical applications 1-cell to 3.3v, 2.8v 2-cell to low noise 3.3v 2-cell to 5v, 1.8v 3537 ta03 ltc3537 v inb 1f v outb 3.3v v oldo 2.8v 2.2h r6 665k endlo v outb fbb v inl v oldo fbl enbst mode pgnd sgnd sw r2 1.74m r1 1m r3 301k r4 1.1m r5 1m 10f 1f on off burst pvm pgdl pgdb lbo lbi alkaline 0.8v to 1.6v + 33pf 3537 ta04 ltc3537 v inb 2-cell alkaline 1.6v to 3.2v 1f v oldo 3.3v 2.2h r6 2m endlo v outb fbb v inl v oldo fbl enbst mode pgnd sgnd sw r2 2m r1 1m r3 523k r4 2.37m r5 1m 10f 1f on off burst pvm pgdl pgdb lbo lbi + 33pf 3537 ta05 ltc3537 v inb 1f v oldo 1.8v 2.2h r6 2m endlo v outb fbb v inl v oldo fbl enbst mode pgnd sgnd sw r2 1.91m r1 604k r3 1m r4 2m r5 1m 10f 1f on off burst pvm pgdl pgdb lbo lbi v outb 5v 2-cell alkaline 1.6v to 3.2v + 33pf
ltc3537 18 3537fc typical applications single cell or 5v input to 3.3v 3537 ta07 ltc3537 v inb 1f 2.2h enldo v outb fbb v inl v oldo fbl enbst mode pgnd sgnd sw r3 1.74m r1 487k r2 511k r5 1.02m r6 510k 10f 3.3v/100ma on off burst pwm pgdl pgdb lbo lbi 0.8v to 1.6v alkaline + usb or 5v adapter 10 f + 33pf li-ion to 5v, 3.3v 3537 ta06 ltc3537 v inb 1f v outb 5v v oldo 3.3v 2.2h r6 2m endlo v outb fbb v inl v oldo fbl enbst mode pgnd sgnd sw r2 1.91m r1 604k r3 523k r4 2.37m r5 499k li-ion 10f 1f on off burst pvm pgdl pgdb lbo lbi + 2.8v to 4.2v 33pf
ltc3537 19 3537fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691) 3.00 p 0.10 (4 sides) recommended solder pad pitch and dimensions 1.45 p 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 p 0.10 bottom viewexposed pad 1.45 p 0.10 (4-sides) 0.75 p 0.05 r = 0.115 typ 0.25 p 0.05 1 pin 1 notch r = 0.20 typ or 0.25 s 45 o chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 p 0.05 3.50 p 0.05 0.70 p 0.05 0.00 C 0.05 (ud16) qfn 0904 0.25 p 0.05 0.50 bsc package outline
ltc3537 20 3537fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 0409 rev c ? printed in usa related parts part number description comments ltc3401 1a (i sw ), 3mhz, synchronous step-up dc/dc converter 97% ef? ciency, v in : 0.5v to 5v, v out(max) = 6v, i q = 38a, i sd <1a, 10-lead ms package ltc3402 2a (i sw ), 3mhz, synchronous step-up dc/dc converter 97% ef? ciency, v in : 0.5v to 5v, v out(max) = 6v, i q = 38a, i sd <1a, 10-lead ms package ltc3421 3a (i sw ), 3mhz, synchronous step-up dc/dc converter with output disconnect 95% ef? ciency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 12a, i sd <1a, qfn24 package ltc3422 1.5a (i sw ), 3mhz synchronous step-up dc/dc converter with output disconnect 95% ef? ciency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 25a, i sd <1a, 3mm 3mm dfn package ltc3423/ltc3424 1a/2a (i sw) , 3mhz, synchronous step-up dc/dc converters 95% ef? ciency, v in : 0.5v to 5.5v, v out(max) = 5.5v, i q = 38a, i sd <1a, 10-lead ms package ltc3426 2a (i sw ), 1.2mhz, step-up dc/dc converter 92% ef? ciency, v in : 1.6v to 4.3v, v out(max) = 5v, i sd <1a, sot-23 package ltc3428 500ma (i sw ), 1.25mhz/2.5mhz, synchronous step-up dc/dc converters with output disconnect 92% ef? ciency, v in : 1.8v to 5v, v out(max) = 5.25v, i sd <1a, 2mm 2mm dfn package ltc3429 600ma (i sw ), 500khz, synchronous step-up dc/dc converter with output disconnect and soft-start 96% ef? ciency, v in : 0.5v to 4.4v, v out(max) = 5v, i q = 20a/300a, i sd <1a, thinsot package ltc3458 1.4a (i sw ), 1.5mhz, synchronous step-up dc/dc converter/output disconnect/burst mode operation 93% ef? ciency, v in : 1.5v to 6v, v out(max) = 7.5v, i q = 15a, i sd <1a, dfn12 package ltc3458l 1.7a (i sw ), 1.5mhz, synchronous step-up dc/dc converter with output disconnect, automatic burst mode operation 94% ef? ciency, v out(max) = 6v, i q = 12a, dfn12 package ltc3459 70ma (i sw ), 10v micropower synchronous boost converter/output disconnect/burst mode operation v in : 1.5v to 5.5v, v out(max) = 10v, i q = 10a, i sd <1a, thinsot package ltc3522 400ma synchronous buck-boost and 200ma synchronous buck converter 95% ef? ciency, v in : 2.4v to 5.5v, v out : 5.25v to 0.6v, i q = 25a, i sd < 1a, 3mm 3mm dfn package ltc3525-3/ ltc3525-3.3/ ltc3525-5 400ma micropower synchronous step-up dc/dc converter with output disconnect 95% ef? ciency, v in : 1v to 4.5v, v out(max) = 3.3v or 5v, i q = 7a, i sd <1a, sc-70 package ltc3525l-3 400ma micropower synchronous step-up dc/dc converter with output disconnect 90% ef? ciency, v in : 0.7v to 4.5v, v out = 3v, i q = 7a, i sd < 1a, sc70 package ltc3526/ ltc3526l 600ma micropower synchronous step-up dc/dc converter with output disconnect 95% ef? ciency, v in : 0.75v to 5v, v out(max) : 1.5v to 5.25v, i q = 12a, i sd <1a, dfn6 package ltc3528/ ltc3528b 1a, 1mhz, synchronous step-up dc/dc converters 94% ef? ciency, v in : 0.7v to 5v, v out : 1.6v to 5.25v, i q = 12a, i sd < 1a, 2mm 3mm dfn package, ltc3528b (pwm mode only) thinsot is a trademark of linear technology corporation.

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